This invention relates in general to electronics and, more particularly, to semiconductor components and methods of manufacturing.
Semiconductor components such as, for example, power transistors are used in a wide variety of applications, including telecommunication, computing, and automotive applications. A power transistor typically has a drain electrode located at a bottom side of the power transistor and also has a gate electrode and a source electrode at a top side of the power transistor. This configuration provides the power transistor with a vertical structure. A common problem with this type of power transistor, however, is its high drain-to-source on-resistance.
To reduce the drain-to-source on-resistance, a deep trench super junction has been added to this type of power transistor. The use of a deep trench super junction reduces an electric field intensity within the power transistor to permit the use of a higher doping level within a body of the power transistor. The higher doping level reduces the drain-to-source on-resistance of the power transistor.
One problem with the use of a deep trench super junction in this type of power transistor is the creation of a Junction Field Effect Transistor (JFET) resistance within the power transistor. This JFET resistance is located below the gate region. Another problem with the use of a deep trench super junction in this type of power transistor is the limitation of the minimum size or pitch of the power transistor. The minimum size of the power transistor is determined by the diffusion of the dopant from the super junction. If the size of the power transistor is too small, the super junction will completely and permanently pinch-off the JFET region of the power transistor, and the power transistor will not function properly. The size or pitch limitation limits the reduction of the power transistor's on-resistance.
Hence, there is a need for a semiconductor component having a low drain-to-source on-resistance, a small size, and a minimal JFET resistance. A need also exists for a method of manufacturing this semiconductor component.
For simplicity and clarity of illustration, the drawing figures illustrate the general manner of construction, and descriptions and details of well-known features and techniques are omitted to avoid unnecessarily obscuring the invention. Additionally, elements in the drawing figures are not necessarily drawn to scale, and the same reference numerals in different figures denote the same elements.
Furthermore, the terms first, second, third, and the like in the description and in the claims, if any, are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. It is further understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein.
Moreover, the terms top, bottom, over, under, and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing relative positions. It is understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other orientations than described or illustrated herein.